ECLair

Custom ECL CPU

  • About ECLair
  • System Overview
  • Microcode & Control Store
  • Instruction Set
  • Registers
  • Paging Subsystem
  • Expansion/Extension Slots
  • Work Log
  • About ECLair
  • System Overview
  • Microcode & Control Store
  • Instruction Set
  • Registers
  • Paging Subsystem
  • Expansion/Extension Slots
  • Work Log

Month: March 2018

Though about changing to 9/18 bit bytes/words

March 31, 2018April 29, 2018

Thought a lot about whether 64k per page table block is really enough space, extensively considered going to 9bit bytes and 18bit alu/registers. Eventually decided against it after a lot of consideration, as I think it would make interop with […]

sen Design Log

Fixed a significant testing bug

March 28, 2018April 29, 2018

Fixed a significant bug in the functional simulator test functionality, it was testing at the wrong moment and also skipping tests at HALT time. Both are now fixed, and sub8.ab passes all tests (it was failing ~60% before).

sen Design Log

Test Console mostly functional now

March 27, 2018April 29, 2018

Test Console in the functional simulator now mostly functional, a couple loose ends to tie up, mainly the fact that it doesn’t appear automatically when a test is loaded, you have to manually show it before loading the ROM.

sen Design Log

Worked on test console

March 26, 2018April 29, 2018

Started working on a separate Test Console window for the functional simulator that lists all the steps of the test, and displays the status and expected/found results for each one.

sen Design Log

More work on functional simulator test runner

March 25, 2018April 29, 2018

Implemented the rest of basic test functionality for the functional simulator, simple tests now run successfully.

sen Design Log

Paging works in simulator

March 24, 2018April 29, 2018

Finished implementing paging in the functional simulator, all working now. Started implementing functionality to run the same test cases the Verilog simulator does, all the functionality to read ASCII-binary test files and build a list of test steps is now […]

sen Design Log

Finished changing how memory display works

March 23, 2018April 29, 2018

Finished migrating the memory display in the functional simulator over to a table and implementing highlighting of where PC currently points. Started adding a page table display as well, this is still a work in progress.

sen Design Log

Documented paging better

March 22, 2018April 29, 2018

Added a diagram of how paging is set up, and started working to move the memory display in the functional simulator from a text box into a proper table, so we can do highlighting and such. Not done this yet, […]

sen Design Log

STATUS/FLAGS works in simulator, as do jumps

March 21, 2018April 29, 2018

Implemented basic STATUS/FLAGS support in the functional simulator and made numerous bug fixes so now the jmp and jmpz tests now run successfully, as does the mode test. Next steps will be to implement paging in the functional simulator, which […]

sen Design Log

Refactored functional simulator decode

March 20, 2018April 29, 2018

Refactored the way control words are decoded in the functional simulator, the code is much simpler and much easier to read now. The next steps will be to complete support for the rest of the microcode including paging, and then […]

sen Design Log

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Work Log

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