Added a first stab at some microcode for PUSH, which is a prerequisite for being able to implement CALL and RETURN. Next step will be to write a useful unit test for it so we can confirm it’s working properly […]

Figured out and diagrammed the initials parts of the logic for handling interrupts. Next step is to implement CALL/RETURN, which will be needed to integrate the design into the system.

Added supervisor/user mode support and a test for it, everything works as intended. Still need to write the unit test for branch-if-CO.

Added conditional branch support and a test for it. Currently only have a test for the branch-if-Z path, not the branch-if-CO path. Next step will be to add a unit test for branch-if-CO, then probably work on fault/trap/interrupt support.

Added support for ALU status bits Z (last operation result was zero) and OC (overflow/carry out) and tests for them. Also added add8.ab which adds lower bytes of registers A and B. Next step will be to add conditional branch […]

Wrote a new unit test system, and implemented tests for all current instructions. Next step will probably be to look at implementation of ALU status bits, so we can do branching in the future.

Implemented ldi8.flags so that paging can be turned on. Fixed a couple bugs in the system, and now paging works! Also while working on this, I renamed PID to PTB (page table block) as one PID could potentially use more […]

Worked out details on the paging system, added it to the schematic, and implemented it. The system can now ldi8.pid to load the current PID into the PID register, then wrpte to load the first entry in the page table. […]

Worked out the right way to fix the sequencing issue/dependency between microcode signals, now the level-sensitive signals (bits 0-23) latch first, then the edge-sensitive signals (bits 24-63) latch, then the edge-sensitive signals are reset back to 0 so they don’t […]

Hacked on the sequencing issue more today, made no real progress.