Added decode support for ROM/RAM/device memory, got everything working so that now an instruction is fetched from ROM at startup and is jumped to in microcode. Started work on the X/Y registers, and started work on a microcode generator so […]
Got the part of the design that’s been diagrammed so far converted into Verilog and working. Now it fetches instructions (from a constant right now, not ROM or RAM yet) and does jumps to their location in microcode.
Started the logical diagram and the microcode layout.
Spent the weekend reading Bit-Slice Microprocessor Design, which clarified a lot of the parts of a microcoded CPU that I’d previously been fuzzy on.
Started putting the basic ideas and architecture for ECLair together.