ECLair

Custom ECL CPU

  • About ECLair
  • System Overview
  • Microcode & Control Store
  • Instruction Set
  • Registers
  • Paging Subsystem
  • Expansion/Extension Slots
  • Work Log
  • About ECLair
  • System Overview
  • Microcode & Control Store
  • Instruction Set
  • Registers
  • Paging Subsystem
  • Expansion/Extension Slots
  • Work Log

Month: April 2018

Built the eclair.computer website

April 29, 2018April 29, 2018

Spent a bunch of time this weekend putting the website for ECLair together. Up until now all of the documentation was a mix of files in the git repository, one wiki page on my projects wiki, and various Google Sheets, […]

sen Administrative

Thoughts on the writable control store

April 26, 2018May 5, 2018 1 Comment

Implemented ability to choose a register to drive the XY bus using IR[7:6], which is the retrieval equivalent of what we’ve been able to do storage-wise for ages now. This will simplify a bunch of things and only added one […]

sen Design Log, Writable Control Store

Low 8-bit shift left done

April 25, 2018April 29, 2018

Instruction to shift low byte of registers left now works and has unit tests. Started working on the instruction to shift the high byte of registers left. This is still a work in progress, currently it shifts junk from the […]

sen Design Log

Shift 16-bit left works for all registers

April 24, 2018April 29, 2018

Shift 16-bit register left now works for registers B-D as well, and has working unit tests. The RPT counter register has also been expanded to 12 bits, so in hardware we’ll build it with two 6-bit chips. This isn’t needed […]

sen Design Log

Shift 16-bit left done

April 22, 2018April 29, 2018

Shift 16-bit register left now fully works with any number of bits! Next step is to implement the tests for registers B-D, then implement byte-wide left shifts. Should also decide if the RPT counter register will be 6 bits or […]

sen Design Log

Shift left starting to work

April 21, 2018April 29, 2018

Shift left now works when shifting by 1 bit! Next step will be to implement very simple conditional jumps in microcode based on RPT, so that multiple shifts can be done in one instruction.

sen Design Log

Started working on first shift microcode

April 20, 2018April 29, 2018

Started working on shl16.a. The first bits of microcode work are implemented for a single-bit left shift, including a simple test case, but the CPU runs away during the test. Next step will be troubleshooting this more to figure out […]

sen Design Log

RPT implemented

April 6, 2018April 29, 2018

Implemented the new RPT counter register in the timing simulator, haven’t tested it yet but it passes all existing regression tests at least.

sen Design Log

Started implementing RPT counter register

April 5, 2018April 29, 2018

Added work done on 2018-04-03 to the functional simulator. Also added RPT register for things the microcode has to do more than once (like the upcoming shift operations). Haven’t implemented anything yet, but started thinking about it and will probably […]

sen Design Log

XY Nibble microcode bit is gone

April 3, 2018April 29, 2018

Eliminated the separate XY Nibble microcode bit and associated logic, and integrated intvect directly as xy_src=8. All tests still passing. The functional simulator still needs to be updated for this change.

sen Design Log

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