The big XY mux is finally gone! I’ve been bumping up against limits in this part of the design since 2014-06-03, but it’s all sorted out now.

I moved the Memory Read bit in microcode up to make room to expand the X/Y Register Source field from 3 bits to 4 in the near future. This will allow 15 different X/Y bus sources which should be more than enough. Each source now has a latch w/ async reset (MC10E143) to connect it to the bus, and an 8-bit binary decoder (MC10H161) drives their reset pins to allow one at a time to drive the bus. Design still passes tests at up to 33MHz (30ns clock) which is great.

Next step will be to eliminate the XY Nibble microcode bit (which was a temporary hack put in place until I could sort out the XY mux) and use an extra binary decoder to add an extra bit to the XY Source field instead, expanding it to the final 16 bits rather than the current 8. This will allow intvect to be added as an XY driver, as well as anything else needed in the future (probably at least DP).