Instruction implementation mostly complete!

Finished off the rewrite of the microcode assembler yesterday, the new one has now taken over as the reference implementation and is the primary microcode assembler used by the simulator. I still want to implement some optimization features later on, but for now I’m going to move on to other areas now that this is complete.

I worked some more on writing microcode, and completed cmp8l/cmp8h, add8h, sub8h which were the last math-type instructions left to implement. Now that that’s done, the remaining bits of microcode to complete are interrupt support (the actual interrupt functionality as well as reti) and traps (trap instruction). Started work on interrupts and got to the point where interrupts will push PC and jump to the ISR, and reti will pop PC successfully. Need to store all the other registers as well, and probably fix some other random problems with interrupt support that I don’t know about yet.

Once work on interrupts are done, I want to finish the paging subsystem, as right now it supports basic paging but not generating page faults for accessing a page that isn’t present, or writing to a page marked read-only. Once that’s completed I’ll go through and review everything and see if there’s anything else obvious that needs doing. Assuming there isn’t, the CPU core will be done! After that I’ll either start working on peripherals, or start working on moving the design into hardware. Either way, this is probably at least a few months away still at this point.