ECLair

Custom ECL CPU

  • About ECLair
  • System Overview
  • Microcode & Control Store
  • Instruction Set
  • Registers
  • Paging Subsystem
  • Expansion/Extension Slots
  • Work Log
  • About ECLair
  • System Overview
  • Microcode & Control Store
  • Instruction Set
  • Registers
  • Paging Subsystem
  • Expansion/Extension Slots
  • Work Log

Category: Design Log

Microcode assembler work

July 13, 2019July 19, 2019

I’ve spent a bit of time over the past couple of months re-implementing the microcode assembler from scratch. The original microcode assembler was thrown together to save me from typing 64 ones and zeroes for every word of microcode (which […]

sen Design Log mcgen, microcode

Microcode getting close to complete

April 29, 2019

I implemented the microcode for the 16 bit, 8 bit low, and 8 bit high variants of AND, OR, and XOR this evening, which went smoothly (if a bit tediously). At this point 47 instructions are implemented in microcode, and […]

sen Design Log

Assembler fully working

April 27, 2019

The new LLVM-based assembler is fully working, and 100% of the regression tests have been moved over to it as of this afternoon. It took close to 9 months to get done, but it’s all working now and gives us […]

sen Design Log, Toolchain llvm, toolchain

Assembler progress

April 11, 2019July 13, 2019

I’ve spent the last few evenings tweaking the LLVM backend’s MC code to fix a lot of minor issues, and it’s to the point where it can generate normal output from ECLair assembly input now! It understands that different instructions […]

sen Design Log, Toolchain llvm, regression tests, toolchain

First successful assembly

April 5, 2019July 13, 2019

Worked on the LLVM backend a bunch more this evening, and it successfully assembled something for the first time! Halt is just 0xfe but the backend only understands 16-bit instructions at the moment, so it assembled as noop, halt, but […]

sen Design Log, Toolchain llvm, toolchain

Lots more toolchain work

April 4, 2019July 13, 2019

I haven’t made any posts here in ages, but that doesn’t mean that work hasn’t been happening behind the scenes! I looked at what my options were last fall when it came to assemblers, and it looked like I had […]

sen Design Log, Toolchain llvm, toolchain

More random reorganizing and a lot more toolchain work

November 3, 2018

Started working on the implementation of jmpe/jmpne, got frustrated that the temporary assembler still doesn’t support two-byte instructions. Fixed this, it now looks at the opcode and figures out which instruction will require a second register-selector byte and handles this […]

sen Design Log, Toolchain

More branch/compare work

November 1, 2018

While thinking about the toolchain I realized I hadn’t ever finished implementing branch instructions. Today I added a microcode bit to negate branching (for the ‘if not’ jump instructions), and implemented the jmpnz and jmpno instructions. Also updated the test […]

sen Design Log

Shuffled instructions a bit

October 31, 2018November 1, 2018

As I started looking at adding ECLair’s instructions to the LLVM port, I realized that a lot of them aren’t organized in a reasonable way. For example, add16 with the source/dest register A has an entirely different pattern of bits […]

sen Design Log, Toolchain

Toolchain Work

October 31, 2018November 1, 2018

I’ve spent a bunch of my spare time over the past few months figuring out a toolchain for ECLair. I’m using LLVM so far, and have been working on learning how to port it to a new target platform and […]

sen Design Log, Toolchain

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Work Log

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