Shift 16-bit register left now fully works with any number of bits! Next step is to implement the tests for registers B-D, then implement byte-wide left shifts. Should also decide if the RPT counter register will be 6 bits or […]
Shift left now works when shifting by 1 bit! Next step will be to implement very simple conditional jumps in microcode based on RPT, so that multiple shifts can be done in one instruction.
Started working on shl16.a. The first bits of microcode work are implemented for a single-bit left shift, including a simple test case, but the CPU runs away during the test. Next step will be troubleshooting this more to figure out […]
Implemented the new RPT counter register in the timing simulator, haven’t tested it yet but it passes all existing regression tests at least.
Added work done on 2018-04-03 to the functional simulator. Also added RPT register for things the microcode has to do more than once (like the upcoming shift operations). Haven’t implemented anything yet, but started thinking about it and will probably […]
Eliminated the separate XY Nibble microcode bit and associated logic, and integrated intvect directly as xy_src=8. All tests still passing. The functional simulator still needs to be updated for this change.
The big XY mux is finally gone! I’ve been bumping up against limits in this part of the design since 2014-06-03, but it’s all sorted out now. I moved the Memory Read bit in microcode up to make room to […]
Implemented high-byte loads for the 8-bit registers, tests for these all now exist and pass. Started thinking about implementing shifts, looked at barrel shifters but they’re far too much logic for now (~64 muxes, which would be ~128 chips), and […]
Thought a lot about whether 64k per page table block is really enough space, extensively considered going to 9bit bytes and 18bit alu/registers. Eventually decided against it after a lot of consideration, as I think it would make interop with […]
Fixed a significant bug in the functional simulator test functionality, it was testing at the wrong moment and also skipping tests at HALT time. Both are now fixed, and sub8.ab passes all tests (it was failing ~60% before).