Toolchain Work
I’ve spent a bunch of my spare time over the past few months figuring out a toolchain for ECLair. I’m using LLVM so far, and have been working on learning how to port it to a new target platform and […]
Category: Design Log
Microcode address width extended, multi-byte instructions working
Was pretty much out of microcode space, so extended the address width from 8 bits to 9. I’d known for awhile that this would likely be needed, as I exceeded 80% of the microcode space used up before even hitting […]
Load/store is done (for now)
Finished all the 8-bit load and store operations, everything has proper unit tests and is working. While doing this it was starting to get hard to manage the single microcode definition file as it’s almost 650 lines long, and it’s […]
Lots of work on load/store today
Decided to start tackling load/store today, which should be a lot of microcode and not much hardware work. Implemented the DP/data pointer register (had always been planned, but hadn’t needed it yet so it wasn’t there), which all load/store operations […]
Instruction implementation spree!
Sat down and wrote out a bunch of microcode tonight, and added a couple more required transformation data paths from MAR to XY (byte swap and sign extend). Binary inversion (NOT) is implemented now in both 8/16 bit forms, as […]
Cleaned up a few TODO items
Spent a bit of time implementing the “clear all internal registers” function and added it into some unit tests, which should result in more accurate testing/catching some edge cases we wouldn’t have caught before. Also simplified the return path for […]
Shift right instructions
Implemented all the shift right instructions this evening, using a latch between MAR and the XY bus that just physically connects the bits shifted over by one. The code is pretty similar to the shift left code, except instead of […]
Writable control store implementation done
Had a lot of TODO items to finish up the writable control store after last time, so took care of all of them today. After thinking about how to implement switching the data input lines for the CS RAM from the […]
First writable control store functionality implemented
After the last bit of thinking about the writable control store, I decided to leave it for a few days and think about it more before implementing anything, because none of the designs I’d come up with seemed practical (either […]
Thoughts on the writable control store
Implemented ability to choose a register to drive the XY bus using IR[7:6], which is the retrieval equivalent of what we’ve been able to do storage-wise for ages now. This will simplify a bunch of things and only added one […]